User Contributed                                           MET/CAL PROCEDURE
=============================================================================
INSTRUMENT:            HP E3610A:DC Power Supply
DATE:                  18-Nov-97
AUTHOR:                User Contributed
REVISION:              0
ADJUSTMENT THRESHOLD:  100%
NUMBER OF TESTS:       16
NUMBER OF LINES:       196
CONFIGURATION:         Datron 1281
STANDARD:              DTB Metered Variac
STANDARD:              Transistor Devices DLP 50
STANDARD:              EPC HS 5-500
=============================================================================
 STEP    FSC    RANGE NOMINAL        TOLERANCE     MOD1        MOD2  3  4 CON
  1.001  ASK+                                          X
  1.002  ASK-                        P                            F
  1.003  HEAD         INITIAL CONDITIONS
  1.004  DISP         The following test equipment is required:
  1.004  DISP         1. Metered vaiac DTB # 2-172
  1.004  DISP         2. Transistor Devices DLP 50-150-3000A
  1.004  DISP         3. EPC HS 5-500 5 Amp Shunt DTB # 14-107
  1.005  DISP         Set the UUT front panel controls as follows:
  1.005  DISP         LINE ON/OFF ........................................ OFF
  1.005  DISP         VOLTAGE ADJUST ............................... fully CCW
  1.005  DISP         CURRENT ADJUST ............................... fully CCW
  1.005  DISP         RANGE .......................................... 3A (up)
  1.006  DISP         Connect the UUT as follows:
  1.006  DISP         OUTPUT + ............................... 1281 Input HI
  1.006  DISP         OUTPUT - ............................... 1281 Input Lo
  1.006  DISP         OUTPUT + .................. 5 amp shunt right terminal
  1.006  DISP         OUTPUT - .............................. DLP 50 - Input
  1.006  DISP         5 amp shunt left terminal ............. DLP 50 + Input
  1.006  DISP         1281 CH A Input HI ........ RIGHT SHUNT METER TERMINAL
  1.006  DISP         1281 CH A INPUT LO ......... LEFT SHUNT METER TERMINAL
  1.007  DISP         Connect UUT AC line cord to Metered Variac.
  1.008  DISP         Set the DLP 50 front panel controls as follows:
  1.008  DISP         VOLTS RANGE ........................................ 60V
  1.008  DISP         AMPS RANGE ......................................... 18A
  1.008  DISP         MODE ............................................. 0-30A
  1.008  DISP         DC switch .......................................... OFF
  1.008  DISP         LOAD ADJUST COARSE/FINE ...................... fully ccw
  1.008  DISP         AC ON ............................................... ON
  1.009  DISP         Set the variac to 115 VAC.
  1.010  DISP         Set the UUT POWER switch to the ON position.
  1.011  HEAD         {* METER ACCURACY TEST *}
  1.012  JMP          2.001
  1.013  EVAL
  2.001  STD          DTB Metered Variac
  2.002  STD          Transistor Devices DLP 50
  2.003  DISP         Set the UUT front panel controls as follows:
  2.003  DISP         CURRENT COARSE/FINE............................ fully CW
  2.004  DISP         Set UUT VOLTAGE controls for a UUT reading of exactly
  2.004  DISP         15 Volts.
  2.005  IEEE         [@1281] DCV AUTO
  2.006  IEEE         [@1281] [D2000]RDG?[I]
  2.007  ACC    200   15.00V         10P% 0.2P/
  2.008  MEME
  2.009  MEMC         V              0.5% 0.02U
#!          Test Tol 0.095, Sys Tol 0.00019, TUR 500.000 (>= 4.00).
  3.001  DISP         Using the UUT VOLTAGE ADJUST, set output for 8.00V.
  3.002  MEMI         Use keyboard to enter actual shunt value in ohms:
  3.003  MATH         M[1] = MEM
  3.004  STD          EPC HS 5-500
  3.005  DISP         Set the DLP 50 front panel controls as follows:
  3.005  DISP         DC switch ........................................... ON
  3.006  DISP         Adjust DLP 50 COARSE and FINE LOAD ADJUST controls
  3.006  DISP         for a UUT reading of exactly 3 amps.
  3.007  IEEE         [@1281]INPUT CH_A
  3.007  IEEE         [@1281] DCV AUTO
  3.008  IEEE         [@1281] [D2000]RDG?[I]
  3.009  MATH         MEM = MEM / M[1]
  3.010  ACC          3.00A          0.1%
  3.011  MEME
  3.012  MEMC         A              0.5% 0.02U
#!          Test Tol 0.035, Sys Tol 0.003, TUR 11.667 (>= 4.00).
  4.001  HEAD         {* LOAD REGULATION TEST *}
  4.002  HEAD         { 0-8V, 0-3A }
  4.003  HEAD         LOAD REGULATION TEST
  4.004  JMP          5.001
  4.005  EVAL
  5.001  DISP         Adjust variac for an reading of 115VAC.
  5.002  IEEE         [@1281] INPUT FRONT
  5.003  IEEE         [@1281] DCV AUTO
  5.004  IEEE         [@1281] [D2000]RDG?[I]
  5.005  MEME
  5.006  IEEE         [D2000]
  5.007  DISP         Set the DLP 50 front panel controls as follows:
  5.007  DISP         DC switch .......................................... OFF
  5.008  IEEE         [@1281] DCV AUTO
  5.009  IEEE         [@1281] [D2000]RDG?[I]
  5.010  MATH         MEM = (MEM - MEM1) * 1000
  5.011  ACC    200   0.000mV        7P% 0.5P/
  5.012  MEME
  5.013  MEMC         mV             2.800U        FULLtoNO
#!          Test Tol 2.8, Sys Tol 0.0001, TUR 28000.000 (>= 4.00).
  6.001  HEAD         {* LINE REGULATION TEST *}
  6.002  JMP          7.001
  6.003  EVAL
  7.001  DISP         Set the DLP 50 front panel controls as follows:
  7.001  DISP         DC switch ........................................... ON
  7.002  DISP         Set the variac to 104 VAC.
  7.003  IEEE         [@1281] DCV AUTO
  7.004  IEEE         [@1281] [D2000]RDG?[I]
  7.005  MEME
  7.006  DISP         Set the variac to 127 VAC.
  7.007  IEEE         [@1281] DCV AUTO
  7.008  IEEE         [@1281] [D2000]RDG?[I]
  7.009  MATH         MEM = (MEM - MEM1) * 1000
  7.010  ACC    200   0.000mV        7P% 0.5P/
  7.011  MEME
  7.012  MEMC         mV             2.800U        104to127VAC
#!          Test Tol 2.8, Sys Tol 0.0001, TUR 28000.000 (>= 4.00).
  8.001  DISP         Set the variac to 115 VAC.
  8.002  HEAD         {* RIPPLE AND NOISE TEST *}
  8.003  JMP          9.001
  8.004  EVAL
  9.001  IEEE         [@1281]ACV AUTO
  9.002  IEEE         [@1281]RDG?[I][D5000]
  9.002  IEEE         [@1281]RDG?[I]
  9.003  MEM*         1000
  9.004  ACC    200   0.000mV        700P% 100P/
  9.005  MEME
  9.006  MEMC         mVRMS          0.200U
#!          Test Tol 0.2, Sys Tol 0.02, TUR 10.000 (>= 4.00).
 10.001  DISP         Set the DLP 50 front panel controls as follows:
 10.001  DISP         LOAD ADJUST COARSE/FINE ...................... fully ccw
 10.002  DISP         Set the DLP 50 front panel controls as follows:
 10.002  DISP         DC switch .......................................... OFF
 10.003  HEAD         {* LOAD REGULATION TEST *}
 10.004  HEAD         { 0-15V, 0-2A }
 10.005  HEAD         LOAD REGULATION TEST
 10.006  JMP          11.001
 10.007  EVAL
 11.001  DISP         Set the UUT front panel controls as follows:
 11.001  DISP         RANGE ........................................ 2A (down)
 11.002  DISP         Using the UUT VOLTAGE ADJUST, set output for 15.00V.
 11.003  DISP         Set the DLP 50 front panel controls as follows:
 11.003  DISP         DC switch ........................................... ON
 11.004  DISP         Adjust DLP 50 COARSE and FINE LOAD ADJUST controls
 11.004  DISP         for a UUT reading of exactly 2 amps.
 11.005  DISP         Adjust variac for an reading of 115VAC.
 11.006  IEEE         [@1281] INPUT FRONT
 11.007  IEEE         [@1281] DCV AUTO
 11.008  IEEE         [@1281] [D2000]RDG?[I]
 11.009  MEME
 11.010  IEEE         [D2000]
 11.011  DISP         Set the DLP 50 front panel controls as follows:
 11.011  DISP         DC switch .......................................... OFF
 11.012  IEEE         [@1281] DCV AUTO
 11.013  IEEE         [@1281] [D2000]RDG?[I]
 11.014  MATH         MEM = (MEM - MEM1) * 1000
 11.015  ACC    200   0.000mV        7P% 0.5P/
 11.016  MEME
 11.017  MEMC         mV             2.800U        FULLtoNO
#!          Test Tol 2.8, Sys Tol 0.0001, TUR 28000.000 (>= 4.00).
 12.001  HEAD         {* LINE REGULATION TEST *}
 12.002  JMP          13.001
 12.003  EVAL
 13.001  DISP         Set the DLP 50 front panel controls as follows:
 13.001  DISP         DC switch ........................................... ON
 13.002  DISP         Set the variac to 104 VAC.
 13.003  IEEE         [@1281] DCV AUTO
 13.004  IEEE         [@1281] [D2000]RDG?[I]
 13.005  MEME
 13.006  DISP         Set the variac to 127 VAC.
 13.007  IEEE         [@1281] DCV AUTO
 13.008  IEEE         [@1281] [D2000]RDG?[I]
 13.009  MATH         MEM = (MEM - MEM1) * 1000
 13.010  ACC    200   0.000mV        7P% 0.5P/
 13.011  MEME
 13.012  MEMC         mV             2.800U        104to127VAC
#!          Test Tol 2.8, Sys Tol 0.0001, TUR 28000.000 (>= 4.00).
 14.001  DISP         Set the variac to 115 VAC.
 14.002  HEAD         {* RIPPLE AND NOISE TEST *}
 14.003  JMP          15.001
 14.004  EVAL
 15.001  IEEE         [@1281]ACV AUTO
 15.002  IEEE         [@1281]RDG?[I][D5000]
 15.002  IEEE         [@1281]RDG?[I]
 15.003  MEM*         1000
 15.004  ACC    200   0.000mV        700P% 100P/
 15.005  MEME
 15.006  MEMC         mVRMS          0.200U
#!          Test Tol 0.2, Sys Tol 0.02, TUR 10.000 (>= 4.00).
 16.001  HEAD
 16.002  DISP         Set the DLP 50 front panel controls as follows:
 16.002  DISP         DC switch .......................................... OFF
 16.003  DISP         Set the UUT front panel controls as follows:
 16.003  DISP         LINE ON/OFF ........................................ OFF
 16.004  END
#! T.U.R.s less than 4.00:                  0
#! T.U.R.s estimated using RANGE value:     0
#! T.U.R.s not calculated (ASK- U):         0
#! T.U.R.s not computable at compile time:  0
#! FOR JUSTIFICATION REFER TO COMMENTS FOLLOWING EACH TEST IN THIS LISTING.